1. Technical Field
The present invention relates to a semiconductor device and a method for determining a state of fuse, and particularly, relates to a semiconductor device including a fuse and a method for determining a state of fuse.
2. Related Art
Conventional technologies in which a fuse is mounted on a semiconductor device to adjust the value of a resistance used in the semiconductor device by cutting the fuse, or a defective element is separated and then it is replaced with a normal element, are known. Typical manner for cutting a fuse includes cutting a fuse by irradiating a laser beam to a portion of the fuse and cutting a fuse by applying an electric current.
Japanese Unexamined Patent Publication 2005-57186 describes an electric fuse which is cut by utilizing a phenomenon in which the material constituting the electric fuse migrates by an electromigration. Here, since a configuration where the portion of the electric fuse to be cut is enclosed by a plate, heat generated in the portion to be cut when a current flows through the fuse is trapped or accumulated. It is described that thus, cutting is accelerated.
Japanese Unexamined Patent Publication 2004-342729, Japanese Unexamined Patent Publication 2000-31283, Japanese Unexamined Patent Publication 2001-210093, Japanese Unexamined Patent Publication 2004-265523 and Japanese Unexamined Patent Publication 2004-103610 describe a technology for determining the state of cutting of such a fuse.
Japanese Unexamined Patent Publication 2004-342729 describes a determination circuit which determines the melt-cut state of a fuse on the basis of the difference between the reference resistance and the resistance of the fuse after melt-cut.
Japanese Unexamined Patent Publication 2000-31283 describes a circuit having an output inverter which monitors the state of a fuse and a switching transistor which initially melt-cuts a fuse and automatically re-fuses the fuse when re-growth of a filament is recognized after the initial melt-cut of the fuse.
Japanese Unexamined Patent Publication 2001-210093 describes a repair signal generating circuit which outputs a repair signal correctly detecting whether or not the fuse is cut, so that a circuit having a defective portion can be surely repaired.
Japanese Unexamined Patent Publication 2004-265523 describes a semiconductor device having such a configuration that the performance of the drive circuit in a latch circuit can be increased in comparison with a normal mode by switching mode signals. As a result, it is described that misrecognition of the disconnection of a fuse can be prevented.
Japanese Unexamined Patent Publication 2004-103610 describes a trimming pattern (electric fuse) for adjustment which selects on or off of the connection of a circuit for adjustment that has been prepared in advance on a semiconductor integrated circuit. FIG. 10 is a schematic plan diagram showing a trimming pattern as described in Japanese Unexamined Patent Publication 2004-103610. The trimming pattern includes two pads 11 and 12 to which a voltage is applied, a fine interconnect 10 connecting the two pads 11 and 12, and two connections 13 and 14 which are located on each of both sides of the fine interconnect 10 without making contact with the fine interconnect 10 and connected to the circuit for adjustment and the semiconductor integrated circuit. With this trimming pattern, when a voltage is applied between the pads 11 and 12, a current flows through the fine interconnect 10 so that the fine interconnect 10 is melt to be connected to the connections 13 and 14. With this operation, an adjustment circuit connected to the connections 13 and 14 is turned on and thus trimming is carried out. In this case, the trimming is not carried out by having the fine interconnect 10 cut such that an adjustment circuit connected to the pads 11 and 12 is turned off. It is described that it is easier to make the melted metal contact to the connections 13 and 14, which are close by, than to melt-cut the fine interconnect 10. Thus, it is described that trimming can be easily carried out in a short period of time.
However, there is a problem with the conventional technology described in Japanese Unexamined Patent Publication 2005-57186, 2004-342729, 2000-31283, 2001-210093, and 2004-265523, in which the cut state of the fuse, which is supposed to be cut, cannot be correctly determined in cases where the fuse is not sufficiently cut, or where the material constituting the fuse migrates to cause reconnection after the fuse is once cut. In addition, the distance between interconnects becomes smaller as semiconductors are miniaturized. Therefore, the problem of short circuiting between interconnects has become significant.
Furthermore, there is also a problem with the technology described in Japanese Unexamined Patent Publication 2004-103610, in which the cut state of the fuse cannot be correctly determined in cases where the melted metal does not make contact with the connections 13 and 14 or where the material constituting the fuse migrates to cause re-cut after the contact is once made. In addition, in the configuration described in Japanese Unexamined Patent Publication 2004-103610, it is necessary to add a structure for applying a voltage between the pads 11 and 12, as well as two connections 13 and 14. Thus, there is another problem that the area increases.